AIM

To design and setup a UJT relaxation oscillator.

COMPONENTS AND EQUIPMENTS NEEDED

1. UJT (2N2446)

2. Resistors

3. Capacitor

4. CRO

4. DC power supply

CIRCUIT DIAGRAM

DESIGN

Take Vp= 10 V and f =1 KHZ

Vp= η VBB+ Vd (Vd can be neglected)

VBB=15V (Assume η = 0.62)

From data sheet valley point specifications are Vv=1.5 V and Iv =4 mA and Ip= 5 mA

Combination of R2 and R4 is indicated as R.

R max= (VBB-Vp)/Ip =1 M

R min = (Vbb-Vv)/Iv =3.2 K

Take the GM of the two values R= 60 K (For this use a 100 K pot in series with 10 K

Now T =RC ln[1/(1-η)]

So C=0.004 uF (use 0.01 uF)

Use 100 Ω resistors at the two bases to provide low discharging path

THEORY

UJT is the Uni Junction Transistor. It is a three terminal device. They are: a) emitter b) base1 c) base2. The equivalent circuit is shown with the circuit diagram. So there are two resistors. One is a variable resistor and other is a fixed resistor. The ratio of internal resistances is referred as intrinsic standoff ratio (η).It is defined as the ratio of the variable resistance to the total resistance. Due to the existing pn junction, there will be a voltage drop. If we apply a voltage to the emitter, the device will not turn on until the input voltage is less than the drop across the diode plus the drop at the variable resistance R1.When the device is turned on holes moves from emitter to base resulting in a current flow. Due to this sudden increase in charge concentration in base1 region conductivity increases. This causes a drop at base1.This region in the graph is known as negative resistance region. If we further increase the emitter voltage the device undergoes saturation. So a UJT has 3 operating regions:

1. Cut off region

2. Negative resistance region

3. Saturation region

In a relaxation circuit there is an RC timing circuit. When the supply is turned on, the capacitor starts charging. When the voltage across the capacitor reaches the pinch off voltage, the UJT turns on. After discharging of capacitor ,again it starts charging, and this process continues till power supply is turned off.

PROCEDURE

1. Test the components and identify the leads of UJT

2. Switch on the power supply.

3. Observe the wave forms at bases and emitter of UJT.

4. Plot the graphs

WAVE FORMS

RESULT

A relaxation oscillator using UJT was designed. Output obtained. Waveforms were plotted.

SAMPLE VIVA QUESTIONS

1. Mention any application of UJT relaxation oscillator

In triggering circuits of SCR

2. What is intrinsic standoff ratio?

See theory

AIM

 To plot the characteristics of UJT (2N 2446) and to determine the intrinsic stand off ratio from the graph.

COMPONENTS AND EQUIPMENTS REQUIRED

1. UJT

2. Resistors

3. Voltmeter

4. Ammeter

5. Rheostat

6. Power supply

CIRCUIT DIAGRAM  

EQUIVALENT CIRCUIT OF UJT

THEORY

       UJT is the Uni Junction Transistor. It is a three terminal device. They are: a) emitter     b) base1  c)base2.The equalent circuit is shown with the circuit diagram. So there are two resistors. One is a variable resistor and other is a fixed resistor. The ratio of internal resistances is referred as intrinsic standoff ratio (η).It is defined as the ratio of the variable resistance to the total resistance. Due to the existing pn junction, there will be a voltage drop. If we apply a voltage to the emitter, the device will not turn on until the input voltage is less than the drop across the diode plus the drop at the variable resistance R1.When the device is turned on holes moves from emitter to base resulting in a current flow. Due to this sudden increase in charge concentration in base1 region   conductivity increases. This causes a drop at base1.This region in the graph is known as negative resistance region. If we further increase the emitter voltage the device undergoes saturation. So a UJT has 3 operating regions:

1. cut off region
2. negative resistance region
3. saturation region

PROCEDURE

 
1. Set up the circuit as shown in the circuit diagram

2. Give the power supply.

3. By varying the input voltage, take the values of voltage and current values

4. Plot the graph

5. Find the in intrinsic standoff ratio from graph.

OBSERVATIONS

               For VBB=12 V                                                           For VBB=6 V

 GRAPH

CALCULATIONS

 
VBB=12 V

VP= Vd + ηvbb

Find the value of Vp from graph.

η  = Vp – Vd/VBB

Similarly find the value of intrinsic stand off ratio for all values of VBB.

RESULT

 
Characteristics of UJT were plotted and intrinsic stand off ratio was found.

η = ………………..

SAMPLE VIVA QUESTIONS

1.      Name a UJT

2N 2446

2. Define intrinsic standoff ratio-See theory

3. Mention any application of UJT

In triggering circuits

AIM 

To plot the characteristics of FET (BFW 10) and to find the following parameters

1. Drain dynamic resistance

2. Mutual conductance

3. Amplification factor

COMPONENTS AND EQUIPMENTS REQUIRED

1. FET

2. Ammeter

3. Voltmeter

4. DC supply

CIRCUIT DIAGRAM

THEORY

    FET is the Field Effect Transistor. It is 3 terminal voltage controlled device. It’s terminals are drain, source and gate. Gate is the controlling terminal. Consider an n channel device. The gate (p material) is diffused. At zero gate voltage there is no reverse voltage at the channel. So as Vds (drain source voltage) increases current Ids also increases linearly. As the voltage is increased, at a particular voltage, pinch off occurs .This voltage is known as pinch off voltage. After pinch off drain current remains stationary .If we apply a gate voltage (negative voltage) the pinch ff occurs early.

Advantages of FET over BJT are:

a) No minority carriers

b) High input impedance

c)  It is a voltage controlled device

d) Better thermal stability

PROCEDURE

 
1. Identify the leads of FET

2. Make the circuit as given.

3. Keeping the gate voltage at 0 V, vary the drain source voltage and observe the current values.

4. Now make the gate voltage at any value (say -1 V) .Vary the drain source voltage and observe the current values.

5.  Plot the graph of static characteristics

6. Now make drain source voltage at a value (say 10 V) and take the ammeter                                                                                                                                                                                                                                                      readings by varying the gate voltage.

7. Take the readings for other drain to source voltages.

8. Plot the graph (transfer characteristics)

9. Find the drain dynamic resistance from static characteristics and Mutual conductance from transfer characteristics by taking the slopes

10. Find the amplification factor by multiplying the above two values

OBSERVATIONS
 

1.      To plot the static characteristics

.Vgs=0 V                                     Vgs= -1 V                               Vgs= -2V

2.      To plot the transfer characteristics

                           Vds=10 V                                                         Vds= 20 V

GRAPH OF STATIC CHARACTERISTICS

TRANSFER CHARACTERISTICS

CALCULATIONS

Drain resistance, rd=∆Vds/∆ Ids (take the slope of graph)

Mutual conductance, gm=∆Id/∆Vgs

Gain, μ=gm rd

RESULT

Characteristics of FET were plotted.

Drain dynamic resistance=…………..

Mutual conductance=………………..

Amplification factor=………………..

SAMPLE VIVA QUESTIONS

1. What are the advantages of FET over BJT?

a) No minority carriers

b) High input impedance

c) It is a voltage controlled device

d) Better thermal stability

3.      Define pinch off voltage

 See theory

AIM   

To plot the characteristics of BC 107 transistor and to find

1. Dynamic input resistance

2. Dynamic output resistance

3. Common emitter current gain

COMPONENTS AND EQUIPMENTS NEEDED
 

1. Transistor

2. Variable power supplies

3. Resistors

4. Voltmeters

5. Ammeters

CIRCUIT DIAGRAM

THEORY
 

         A transistor is a 3 terminal device. It can be considered as the combination of two diodes. In a transistor there are 3 regions: 1.emitter 2.base 3.Collector. In an npn transistor the emitter and collector are n types, and base is p type. In any transistor emitter is heavily doped, base is lightly doped and collector is moderately doped. For the proper working of transistor the emitter base junction should be forward biased and collector base junction should be reverse biased. In a common emitter configuration, emitter is common to both input and output.

          Transistor (bipolar transistor-BJT) is a current controlled device. The input characteristics are a plot between the base current and base emitter voltage. The dynamic input resistance can be calculated by taking the slope of the input characteristics by keeping the output voltage constant. The output characteristics is a plot between collector current and collector emitter voltage by keeping the input current constant..Now the common emitter current gain ß can be calculated as a ratio between collector current and base current at a particular value of output voltage (collector emitter voltage)

PROCEDURE
 

1. Check the components and identify the leads of transistor.

2. Keeping the rheostats at minimum position, switch on the power supplies

3. Make the voltage at collector emitter as zero and vary the rheostat at input side in small steps

4. Do the above step for other collector –emitter voltages (eg: Vce=3 V, Vce=5 V) and tabulate the readings.

5. Switch off the power supplies and switch on the supplies and make the input current at 40 uA.

6. By varying the rheostat at output note down the readings of ammeter and voltmeter readings.

7. Repeat the above step, for a few number of times for various base current values (eg:IB =60 uA)

8. Plot the graph

9. Calculate the dynamic input resistance, dynamic output resistance and common emitter current gain.

OBSERVATIONS

1.      To plot input characteristics

For VCE=0V                               For VCE=3 V                              

2.      To plot the output characteristics

           For IB=40 uA                             For IB=60 uA                          For IB=80 uA

GRAPH

1.  INPUT CHARACTERISTICS

2.OUTPUT CHARACTERISTICS

CALCULATIONS

 
Dynamic input resistance= slope of input characteristics=………..

Dynamic output resistance=slope of out put characteristics=……..

Common emitter current gain=………………

RESULT

CE characteristics of an NPN transistor were plotted    .

Dynamic input resistance=……………..

Dynamic output resistance=…………….

Common emitter current gain=…………..

SAMPLE VIVA QUESTIONS

1.      In the name of BC 107 what B, C and 107 stands for?

          B –For silicon (A –For germanium)

         C-Audio frequency low power (Application of device)

         107-is the serial number

2.      Define α, β, γ

          First one is the common base current gain. Second one is the common emitter current gain. Third one is the common collector current gain.

3.      What is the advantage of silicon over germanium?

          Easily available.

4.      Draw the circuit of a Darlington pair

5.      Write the name of a Darlington package

2N999

6.      What are the advantages of Darlington pair?

High input resistance, more gain

AIM 

To design and setup an RC integrator and differentiator circuits

COMPONENTS AND EQUIPMENTS REQUIRED

1. Capacitors

2. Resistors

3. Signal generator

4. CRO

CIRCUIT DIAGRAM AND DESIGN

1.      DIFFERENTIATOR WITH INPUT FREQUENCY 1 KHZ

Input voltage is 20 v pp.

DESIGN

RC<0.0016T; Take R= 5.6 K (To avoid the loading R should be more than ten times the resistance of signal generator)   So   C= 220 p F  ( T=I ms  because the input frequency is I kHz)

2.      INTEGRATOR

DESIGN

RC>16 T

T= 1 ms, Take R=5.6 K to avoid loading effect of signal generator.

So C=2.2 uF (approximately)

THEORY

           A differentiator gives the derivative of input voltage as output.  A differentiator using passive components resistors and capacitors is a high pass filter. The circuit is shown .It acts as a differentiator only when the time constant is too small. The voltage at output is proportional to the current through the capacitor. The current through the capacitor can be expressed as   C dv/dt. The output is taking across the resistor. So output will be RC dv/dt. Thus differentiation of input takes place.

          When a square wave is applied at the input, during the positive half cycle capacitor charges. So initially the voltage across the resistor will be the applied voltage. As the capacitor charges, the voltage across resistor decreases.

                Now consider the case of integrator. It is a low pass filter. Here the time constant of the circuit should be very large. Here output is taking across the capacitor. As the input square wave is applied, during the positive half cycle the voltage across capacitor increases from zero, to the maximum (peak value of applied voltage). During the negative half cycle, the capacitor starts to discharge and comes to zero. This process repeats for the remaining cycles and a triangular wave is obtained.

PROCEDURE

1. Set up the differentiator circuit.

2. Apply the square wave of 5V pp at 1 KHz.

3. Observe the output and plot it.

4. Do the above steps for differentiator also.

WAVE FORMS

1.      DIFFERENTIATOR

2.      INTEGRATOR

RESULT

Integrator and differentiator circuits were designed and set up .Output wave forms were plotted.

SAMPLE VIVA QUESTIONS

1.      What is a high pass filter?

      High pass filter is a circuit which passes frequencies above a cut off frequency.

2.      What is the requirement of a high pass filter to act as differentiator?

        The time constant should be very less.

3.      What is low pass filter?

       A circuit which passes all frequencies below a cut off is called a low pass filter.

4.      What is the requirement of a low pass filter to act as integrator?

        Time constant should be high

5.      What is time constant of an RC circuit?

          It is the time needed to charge the capacitor to 63.2% of input voltage.

6.      Mention one application of the RC integrator and differentiator.

         In amplitude modulation circuits