Archive for the ‘Security & Saftey’ Category

One transistor code lock

Description.

This is of course the simplest electronic code lock circuit one can make. The circuit uses one transistor, a relay and few passive components. The simplicity does not have any influence on the performance and this circuit works really fine.

The circuit is nothing but a simple transistor switch with a relay at its collector as load. Five switches (S0 to S4) arranged in series with the current limiting resistor R2 is connected across the base of the transistor and positive supply rail. Another five switches (S5 to S9) arranged in parallel is connected across the base of the transistor and ground. The transistor Q1 will be ON and relay will be activated only if all the switches S0 to S4 are ON and S5 to S9 are OFF. Arrange these switches in a shuffled manner on the panel and that it. The relay will be ON only if the switches S0 to S9 are either OFF or ON in the correct combination. The device to be controlled using the lock circuit can be connected through the relay terminals. Transformer T1, bridge D1, capacitor C1 forms the power supply section of the circuit. Diode D2 is a freewheeling diode. Resistor R1 ensures that the transistor Q1 is OFF when there is no connection between its base and positive supply rail.

Circuit diagram.

one transistor code lock

Notes.

  • This circuit can be assembled on a Vero board.
  • Switch S1 is the lock’s power switch.
  • The no of switches can be increased to make it hard to guess the combination.
  • Transistor 2N2222 is not very critical here. Any low or medium power NPN transistor will do the job.

Wire loop alarm

Description.

Here is the circuit diagram of a very simple wire loop alarm based on  a N-channel enhancement FET 2N700, a buzzer and few passive components.In normal condition the gate of 2N700 (Q1) is connected to the ground through a 100K resistor (R2) and the wire loop. When the wire loop is broken , Q1 will be biased to ON state and the buzzer is activated.The circuit consumes very less standyby current and so the battery will last for a very long period of time.

Circuit diagram.

wire loop alarm circuit

Notes.

  • Assemble the circuit on a good quality PCB.
  • The circuit can be a powered from a 9V PP3 battery.
  • K1 can be  a  miniature  9V buzzer.

How to protect IGBT

How to protect IGBT from failures and breakdowns ?

IGBT-Structure

Insulated Gate Bipolar Transistors are susceptible to gate insulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler’s body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge.

IGBTs can be handled safely if the following basic precautions are taken:

Handling Precautions For IGBTs.

1.  Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as “ECCOSORBD™ LD26″ or equivalent.

2.  When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means, for example, with a metallic wristband.

3. Tips of soldering irons should be grounded.

4. Devices should never be inserted into or removed from circuits with power.

5. Gate Voltage Rating. Never exceed the gate-voltage rating of VGEM. Exceeding the rated VGE can result in permanent damage to the oxide layer in the gi region.

6. Gate Termination. The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup.

7. Gate Protection. These devices do not have an internal monolithic Zener Diode from gate to emitter.If gate protection is required an external Zener is recommended. ECCOSORBD™ is a Trademark of Emerson and Cumming, Inc.


3. Tips of soldering irons should be grounded.

4. Devices should never be inserted into or removed from circuits with power 01

5. Gate Voltage Rating. Never exceed the gate-voltage rating of VGEM. Exceeding the rated VGE can result in permanent damage to the oxide layer in the gi region.

6. Gate Termination. The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup.

7. Gate Protection. These devices do

not have an internal monolithic

Zener Diode from gate to emitter.

If gate protection is required an external Zener is recommended. ECCOSORBD™ is a Trademark of Emerson and Cumming, Inc.

How to protect mosfet devices

MOSFET requires very careful handling particularly when out of circuit. In circuit a MOSFET is as rugged as any other solid-state device of similar construction and size.

MOSFETs have an ultra-thin silicon dioxide layer between the channel and the gate. Because the insulating layer is so thin, it is easily destroyed by excessive gate source voltage VGS. On application of large gate voltage, an open-circuit gate may accumulate enough charge so as to develop an electric field large enough to puncture the thin Si02 layer.

Aside due to direct application of an excessive gate-to-source voltage VGS, the thin Si 02 layer may get destroyed in more subtle ways. If a MOSFET is inserted or removed from a circuit while the power is ON, transient voltages caused by inductive kickback and other effects may exceed VGg /max rating. This will wipe out the MOSFET. Even picking up a MOSFET may deposit enough static charge to exceed the VGS (max) rating. Generally, ground rings are used to short all leads of a MOSFET for avoiding any voltage build up between gate and source. The grounding or shorting rings are removed after the MOSFET is connected in the circuit. Sometimes conducting foam is applied between the leads  Some MOSFETs are protected by built-in Zener diodes in parallel with the gate and source, as shown in figure. With normal operating voltages, the Zener diode remains open and does not influence the working of the circuit. In case of an extremely high VGS, the Zener diode breaksdown thereby limiting the gate potential to a value equal to the Zener diode breakdown voltage, much smaller than VGS max rating. The disadvantages of these internal Zener diodes are that MOSFET’s high input impedance is reduced. The trade­off is worth it in some applications because expensive MOSFETs get easily destroyed without Zener protection.

Mosfet Protection Circuit

Mosfet Protection Circuit

Precaution for protecting Mosfet devices:

MOSFETs are delicate devices and can get easily destroyed. So they are to be handled carefully. Further-more, they should never be connected or disconnected while the power is ON. Finally, before picking up a MOSFET device, get your body grounded by touching the chasis of the equipment you are working on.

How to protect Cmos devices and IC’s

Cmos IC protection

Cmos IC protection

All MOS devices have insulated gates that are subject to voltage breakdown. For instance the gate oxide for Motorola CMOS devices is about 900 A thick and breaks down at a gate-source potential of about 100 V. To guard against such a breakdown from static discharge or other voltage transient, the protection networks shown in figure are used on each input to the CMOS device.

Static damaged devices behave in different ways, depending on the severity of the damage. The most severely damaged inputs are the easiest to detect because the input has been completely destroyed and is either shorted to VDD, shorted to Vgs or open-circuited. The effect is that the device no longer responds to signals present at damaged input. Less severe cases are more difficult to detect because they indicate as intermittent failures or as degraded performance. Another effect of static damage is that the inputs generally have increased leakage currents.

Although the input protection network provides a great deal of protection, CMOS devices are not immune to large static voltage discharges that can be generated during handling. For example, static voltage generated by a person walking over a waxed floor have been measured in the 4-15 kV range (depending upon humidity, surface conditions etc.).

Important precautions for protecting/safe guarding Cmos devices

1. Do not exceed the maximum ratings specified in the data sheet.

2. All unused device inputs should be connected to VDD or Vss

3. All low-impedance equipment (pulse generators, etc) should be connected to CMOS inputs only after the device is energized. Similarly, this type of equipment should be disconnected before power is switched off.

4. Circuit boards containing CMOS devices are merely extensions of the devices, and the same handling precautions apply. Contacting edge connectors wired directly to device inputs can cause damage. Plastic wrapping should be avoided. While external connections to a PC board are connected to an input of CMOS device, a resistor should be used in series with the input. This series resistor helps limit accidental damage if the PC board is removed and brought into contact with static generating materials. The limiting factor for the series resistor is the added delay. This is caused by the time constant formed by the series resistor and input capacitance. Note that the maximum input rise and fall times should not be exceeded. In figure two possible networks are shown using a series resistor to reduce ESD (electrostatic discharge) damage.

These networks are useful for the protection of

· digital inputs and outputs

· analog inputs and outputs

· 3-state outputs

· bidiSrectional (I/O) ports.

5. All CMOS devices should be stored or transported in materials that are antistatic. CMOS devices must not be inserted into conventional plastic ’snow’, styro foam, or plastic trays, but should be left in their original container until ready for use.

6. All CMOS devices should be placed on a ground bench surface and operators should ground themselves prior to handling devices since a worker can be statically charged with respect to the bench surface. Wrist straps in contact with skin are strongly recommended.

7. Nylon or other static generating materials should not come in contact with CMOS devices.

8. If automatic handlers are being used, high levels of static electricity may be generated by the movement of the device, the belts or the boards. Reduce static build-up by using ionized air blowers or room humidifiers. All parts of the machines which come into contact with the top, bottom, or sides of IC packages must be grounded to metal or other conductive material.

9. Cold chambers employing C02 for cooling should be equipped with baffles, and the CMOS devices must be contained on or in conductive material.

10. When lead-straightening or hand-soldering is required, provide ground straps for the apparatus used and be sure that soldering ties are grounded.

11. The use of static detection meters for production line surveillance is highly recommended.

12. Equipment specifications should alert users to the presence of CMOS devices and require familiarization with this specification prior to performing any kind of maintenance or replacement of devices or modules.

13. Do not insert or remove CMOS devices from test sockets with power applied. Check all power supplies to be used for testing devices to be certain there are no voltage transient present.

14. Double check test equipment setup for proper polarity of VDD and VSS before conducting parametric or functional testing.

15. Do not recycle shipping rails or trays. Repeated use cause deterioration of their antistatic coating.

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