MOSFET Technology and Various MOS Process
This article focuses on basics of MOSFET Technology,basics of various MOS process like p-channel MOS (PMOS), n-channel MOS (NMOS), Complimentary MOS (CMOS) – its manufacturing, cross section, and other advantages of one over other.
Most of the LSI/VLSI digital memory and microprocessor circuits is based on the MOS Technology. More transistor and circuit functions can be achieved on a single chip with MOS technology, which is the considerable advantage of the same over bipolar circuits. Below given are the reasons for this advantage of MOS technology:
- Less chip area is demanded by an Individual MOS transistor, which results in more functions in less area.
- Critical defects per unit chip area is low for a MOS transistor because it involves fewer steps in the fabrication of a MOS transistor.
- Dynamic circuit techniquesÂ are practical in MOS technology, but not in bipolar technology. A dynamic circuit technique involves use of fewer transistors to realise a circuit function.
So you are already clear that because of above said reasons, its considerably cheap to use MOS technology over Bipolar one.
Three types of MOS process are PMOS, NMOS and Complimentary MOS. Let’s take a look at brief descriptions below.
p-Channel MOS or PMOS Technology
This MOS process operates at a very low data rate say 200Kbps to 1Mbps. PMOS is also considered as the first MOS process which required special supply voltages as -9 volts, -12 volts and so on.
n-Channel MOSÂ or NMOS Technology
We can say this is a second generation MOS process, after PMOS, which has considerable improvement in data rates; say up to 2Mbps and resulted in the construction of LSI circuits of a single standard +5volt supply.NMOS increases circuits speed in sharp, because of reduction in the internal dimensions of devices; which is contrary to (and an advantage over) bipolar circuits whose speed increases gradually.The difference in performance between both circuits have steadily become smaller for both LSI and VLSI because of steady improvements in pattern definition capability.
Have you ever heard of Self aligned silicon gate NMOS ? It’s a commonly used and popular version of MOS technology. Now a days, a technique named as local oxidation is used for this process to improve circuit density and performance. HMOS, SMOS and XMOS are the commonly used names by manufacturers for this. Older versions of the process like Metal Gate NMOS and PMOS are not used now a days for latest designs. A second layer of poly-silicon may be added to the process for important memory applications.
Complementary MOS Technology
So you might have already got an idea from the name “Complimentary MOS” ? Its a combination of both n-channel and p-channel devices in one chip. Compared to both other process, CMOS is complex in fabrication and requires larger chip area. Biggest advantage of a CMOS circuit is reduced power consumption (less than NMOS); it is designed for zero power consumption in steady state condition for both logic states. As you may already know, CMOS circuits are widely used in digital equipments like watches, computers etc.
CMOS offers comparatively higher circuit density and high speed performance (used in VLSI);and this is the primary reason why CMOS is still preferred despite it’s complex manufacturing process. Memories and microprocessors made of CMOS usually employ silicon gate process.
There are variations of MOS technology which offer either better performance or density advantages over the standard process. Some of those are named as VMOS (V-groove MOS), DSA (Diffusion Self Aligned), SOS (Silicon on Saphire), D-MOS (Double diffused MOS) etc.
Simple MOSFET Structures
MOS Technology comprises of 3 process basically, p-channel MOS, n-channel MOS and CMOS process. The basic purpose of all these process is to enhance MOSFET performance one over the other, like lower power consumption, high power capability, relaibility improvements, response speed etc.
The PMOS is the first device made in metal gate p-channel technology. PMOS infact is an older version of the MOS process which is not used nowadays. A cross sectional view of the PMOS structure is shown below.
The starting material is a single crystal Si that is doped n-type with phosphorus or antimony with a doping level on the order of 1015 atoms/cm3.
So the process is like this, first grow a relatively thick oxide layer; say 1.5micros and then etch windows for the source to drain diffusion. As a next step we have to boron dope the source and drain regions with 2 to 4 micro meters depth. Lets next form the gate oxide, that serves as the dielectric used for turning ON and OFF the MPS device. The entire circuit is then metalised and etched so that there is metal over the gate, drain, and the source. The metal layer should be 1 to 2 micrometers thick and is deposited using an electron beam evaporator.
An NMOS structure also follows a similar pattern or sequence as shown in the crosssectional figure above; and is similar to PMOS except for the n+ regions which are diffused into the p-type silicon substrate.