To know more about the basics, click on the link below.
TAKE A LOOK : IC FABRICATION TECHNIQUES
When a sample of crystalline silicon is covered with silicon dioxide, the oxide-layer acts as a barrier to the diffusion of impurities, so that impurities separated from the surface of the silicon by a layer of oxide do not diffuse into the silicon during high-temperature processing. A p-n junction can thus be formed in a selected location on the sample by first covering the sample with a layer of oxide [oxidation step] removing the oxide in the selected region, and then performing a predeposition and diffusion step. The selective removal of the oxide in the desired area is performed with photolithography. Thus, the areas over which diffusions are effective are defined by the oxide layer with windows cut in it, through which diffusion can take place. The windows are produced by the photolithographic process. This process is the means by which microscopically small electronic circuits and devices can be produced on silicon wafers resulting in as many as 10000 transistors on a 1 cm x 1 cm chip.
In fact photolithography or optical lithography is a kind of lithography. The lithography technique was first used in the late 18th century by people interested in art. A lithograph is a less expensive picture made from a flat, specially prepared stone or metal plate and the lithography is art of making lithographs. Therefore, lithography for IC manufacturing is analogous to the lithography of the art world. In this process the exposing radiation, such as ultraviolet (UV) light in case of photolithography, is transmitted through the clear parts of the mask. The circuit pattern of opaque chromium blocks some of die radiation. This type of chromium/glass mask is used with UV light. Other types of exposing radiations are electrons, X-rays, or ions. Thus for IC manufacturing we have following types of lithography. Photolithography has been explained in this post. To know about the other types of lithographic process, click on the link below.
In IC fabrication a number of masks are employed. Except for the first mask, every mask must be aligned to the pattern produced by the previous mask. This is done using mask aligner. The mask aligner may be contact type or proximity type or projection type. Accordingly we have three types of printing. They are
- Contact printing
- Proximity printing
- Projection printing
Photolithographic Process Steps
1. Photoresist Application (Spinning)
A drop of light-sensitive liquid called photoresist is applied to the centre of the oxidized silicon wafer that is held down by a vacuum chuck. The wafer is then accelerated rapidly to a rotational velocity in the range 3000 to 7000 RPM for some 30 to 60 seconds. This action spreads the solution in a thin, nearly uniform coat and spins off the excess liquid. The thickness of the coat so obtained is in the range 5000 to 10000 A, as shown in the figure below. The thickness of the photoresist layer will be approximately inversely proportional to the square root of the rotational velocity.
Sometimes prior to the application of the photoresist the silicon wafers are given a “bake-out” at a temperature Of at least 100°C to drive off moisture from the wafer surfaces so as to obtain better adhesion of the photoresist. Typical photoresist used is Kodak Thin Film Resist (KTFR).
The silicon wafers coated with photoresist are now put into an oven at about 80°C for about 30 to 60 minutes to drive off solvents in the photoresist and to harden it into a semisolid film.
3. Alignment and Exposure
The coated wafer, as above, is now placed in an apparatus called a mask aligner in very close proximity (about 25 to 125 micro meters) to a photomask. The relative positions of the wafer and the photomasks are adjusted such that the photomask is correctly lined up with reference marks or a pre-existing pattern on the wafer.
The photomask is a glass plate, typically about 125 mm square and about 2 mm thick. The photomask has a photographic emulsion or thin film metal (generally chromium) pattern on one side. The pattern has clear and opaque areas. The alignment of the photomask to the wafer is often required to be accurate to within less than 1 micro meter, and in some cases to within 0.5 micro meters. After proper alignment has been achieved, the wafer is brought into direct contact with the photomask. Photomask making will be described separately.
A highly collimated ultraviolet (UV) light is then turned on and the areas of the silicon wafer that are not covered by the opaque areas of the photomask are exposed to ultraviolet radiation, as shown in the figure. The exposure time is generally in the range 3 to 10 seconds and is carefully controlled such that the total UV radiation dosage in watt-seconds or joules is of the required amount.
Two types of photoresist exist- negative photoresist and positive photoresist. In the present description negative photoresist is used in which the areas of the photoresist that are exposed the ultraviolet radiation become polymerized. The polymerization process increases the length of the organic chain molecules that make up the photoresist. This makes the resist tougher and makes it essentially insoluble in the developer solution. The resisting photoresist pattern after the development process will therefore be a replication of the photomask pattern, with the clear areas on the photomask corresponding to the areas where the photoresist remains on the wafers, as shown in the figure below.
An opposite type of process occurs with positive photoresist. Exposure to UV radiation results in depolymerization of the photoresist. This makes these exposed areas of the photoresist readily soluble in the developer solution, whereas the unexposed areas are essentially insoluble. The developer solution will thus remove the exposed or depolymerized regions of the photoresist, whereas the unexposed areas will remain on the wafer. Thus again there is a replication of the photomask pattern, but this time the clear areas of the photomask produce the areas on the wafer from which the photoresist has been removed.
After development and rinsing the wafers are usually given a postbake in an oven at a temperature of about 150°C for about 30 to 60 minutes to toughen further the remaining resist on the wafer. This is to make it adhere better to the wafer and to make it more resistant to the hydrofluoric acid [HF] solution used for etching of the silicon dioxide.
6. Oxide Etching
The remaining resist is hardened and acts as a convenient mask through which the oxide layer can be etched away to expose areas of semiconductor underneath. These exposed areas are ready for impurity diffusion.
For etching of oxide, the wafers are immersed in or sprayed with a hydrofluoric [HF] acid solution. This solution is usually a diluted solution of typically 10: 1, H2O : HF, or more often a 10 : 1 NH4F [ammonium fluoride]: HF solution. The HF solutions will etch the SiO2 but will not attack the underlying silicon, nor will it attack the photoresist layer to any appreciable extent. The wafers are exposed to the etching solution ion enough to remove the SiO2 completely in the areas of the wafer that are not covered by the photoresist as shown in the figure.
The duration of oxide etching should be carefully controlled so that all of the oxide present only in the photoresist window is removed. If etching time is excessively prolonged, it will result in more undercutting underneath the photoresist and widening of the oxide opening beyond what is desired.
The above oxide etching process is termed wet etching process since the chemical reagents used are in liquid form. A newer process for oxide etching is a dry etching process called plasma etching. Another dry etching process is ion milling.
7. Photoresist Stripping
Following oxide etching, the remaining resist is finally removed or stripped off with a mixture of sulphuric acid and hydrogen peroxide and with the help of abrasion process. Finally a step of washing and drying completes the required window in the oxide layer. The figure below shows the silicon wafer ready for next diffusion.
Negative photoresists, as above, are more difficult to remove. Positive photoresists can usually be easily removed in organic solvents such as acetone.
The photolithography may employ contact, proximity, or projection printing. For IC production the line width limit of photolithography lies near 0.4 micro meters, although 0.2 micro meters features may be printed under carefully controlled conditions. At present, the photolithography occupies the primary position among various lithographic techniques.
One of the major factors in providing increasingly complex devices has been improvement in photolithographic art. A large part of this improvement has been due to high quality photoresist, materials as improved techniques of coating, baking, exposing and developing photoresists.
The principal constituents of a photoresist solution are a polymer, a sensitizer and a suitable solvent system Polymers have properties of excellent film forming and coating. Polymers generally used are polyvinyl cinnamate, partially cyclized isoprene family and other types are phenol formaldehyde.
When photoresist is exposed to light, sensitizer absorbs energy and initiates chemical changes in the resist. The sensitizers are chromophoric organic molecules. They greatly enhance cross linking of the photoresist. Cross linking of polymer or long chain formation of considerable number of monomers makes high molecular weight molecules on exposure to light radiation, termed as photo-polymerization. Typical sensitizers are carbonyl compounds, Benzoin, Benzoyl peroxide, Benzoyl disulphide, nitrogen compounds and halogen compounds.
The solvents used to keep the polymers in solution are mixture of organic liquids. They include aliphetic esters such as butyl acetate and cellosolve acetate, aromatic hydrocarbons like xylene and Ethylbenzene, chlorinated hydrocarbons like chlorobenzene and methylene chloride and ketones such as cyclohexanone. The same solvents are used as thinners and developers.
Characteristics of Good Photoresist
To achieve faithful registration of the mask geometry over the substrate surface, the resist should satisfy following conditions.
- Uniform film formation
- Good adhesion to the substrate
- Resistance to wet and dry etch processes
Types of Photoresist
Polymers film is either photosensitive or capable or reacting with the pholysis product of additional compound so that the solubility increases or decreases greatly by exposure to UV (ultra-violet) radiation. According to the changes that take place, photoresists are termed negative or positive. Materials which are rendered less soluble in a developer solution by illumination^ yield a negative pattern of the mask and are called negative photoresists. Conversely, positive photoresists become more soluble when subjected to light and therefore yield a positive image of the mask.
Kodak negative photoresist contain polyvinyl cinnametes. KPR is being used in printing circuit boards. KTFR is widely used in fabrication of ICs. It provides good adhesion to silicon dioxide and metal surfaces. It gives well etch results to different etchant solutions. For finer resolution, thinner coating of KTFR is used. To achieve controlled and uniform thickness, the viscosity of resist is suitably lowered using thinners.
Another negative photoresist is Kodak Microneg 747 which provides high scan speeds at high aperature giving high throughput and resolution.
Positive Photoresists have solved the problem of resolution and substrate protection. Photo resists can be used at a coating thickness of 1 micro meter that eliminates holes and minimises defects from dust.
Positive photoresist is inherently of low solubility (polymerized) material. The base polymer is active by itself. A sensitizer, when absorbs light, makes the base resist soluble in an alkali developer. Positive photoresists are Novolac resins. Typical solvents are cellosolve acetate, butyl acetate, xylene and toluene.
Resist requirements for VLSI
For fine line geometries in VLSI circuits, the resist requirements become more stringent. The resist properties should meet the required demand of high resolution. Here the resist should exhibit
- High sensitivity for partial exposure tool chosen
- Dry developing, dry compatibility
- Vertical profile control
Photolithography is used to produce windows in the oxide layer of the silicon wafer, through which diffusion can take place. For this purpose photomask is required. In this section we shall discuss various techniques of mask fabrication. The pattern appearing on the mask is required to be transferred to the wafer. For this purpose various exposure techniques are employed. We will also discuss these techniques.
IC fabrication is done by the batch processing, where many copies of the same circuit are fabricated on a single wafer and many wafers are fabricated at the same time. The number of wafers processed at one time is called the lot size and many vary between 20 to 200 wafers. Since each IC chip is square and the wafer is circular, the number of chips per wafer is the number of complete squares of a given size that can fit inside a circle.
The pattern for the mask is designed from the circuit layout. Many years ago, bread boarding of the circuit was typical. In this, the circuit was actually built and tested with discrete components before its integration. At present, however, when LSI and VLSI circuits contain from a thousand to several hundred thousand components, and switching speeds are of such high order where propagation delay time between devices is significant, bread boarding is obviously not practical. Present-day mask layout is done with the help of computer.
The photographic mask determines the location of all windows in the oxide layer, and hence areas over which a particular diffusion step is effective. Each complete mask consists of a photographic plate on which each window is represented by an opaque are, the remainder being transparent. Each complete mask will not only include all the windows for the production of one stage of a particular IC, but in addition, all similar areas for all such circuits on the entire silicon as shown in the figure below.
It will be obvious that a different mask is required for each stage in the production of an array of IC’s on a wafer. There is also a vital requirement for precise registration between one mask and the other in series, to ensure that there is no overlap between components, and that each section of a particular transistor is formed in precisely the correct location.
To make a mask for one of the production stages, a master is first prepared which is an exact replica of that portion of the final mask associated with one individual integrated circuit, but which is 250x [say] enlargement of the final size of IC. The figure below shows a possible master for the production of a mask to define a particular layer of diffusion for a hypothetical circuit. Art work at enlarge size avoids large tolerance errors. Large size also permits the art work to be dealt easily by human operator. In the design of the art work, the locations of all components that is, resistor, capacitor, diode, transistor and so on, are determined on the surface of the chip. Therefore, six or more layout drawings are required. Each drawing shows the position of Windows that are required for a particular step of the fabrication. For complex circuit the layout is generated by the use of computer-aided graphics.
The master, typically of order 1 m x 1 m, is prepared from cut and strip plastic material which consists of two plastic films, one photographically opaque called Rubilith and the other transparent [mylar], which are laminated together. The outline of the pattern required is cut in the red coating of Rubilith (which is opaque) using a machine controlled cutter on an illuminated drafting table. The opaque film is then peeled off to reveal transparent areas, each representing a window region in die final mask.
The next step is to photograph the master using back illumination, to produce a 25 x reduced sub-master plate. This plate is used in a step and repeat camera which serves the dual purpose of reducing the pattern by a further 10 x to finished size and is also capable of being stepped mechanically to produce an array of identical patterns on the final master mask, each member of the many corresponding to one complete IC. Instead of the photographic plate being transported mechanically in discrete steps, better accuracy may be achieved by using continuous plate movement; discrete exposures then being made by an electronically synchronized flash lamp which effectively freezes the motion.
The entire sequence just described can be done with plates containing a photosensitive emulsion; typically the emulsion is considered too vulnerable to abrasion and tears. For this reason, masks are often made of harder materials such as chrome or iron oxide.
For very complex circuits automated mask generation equipment is used. In this, a computer controlled light flashes to build up the pattern on a photographic film by a series of line or block exposures, the resulting film is then reduced and handled in a step and repeat system to create the production mask. Alternatively, the master mask can be generated by an electron beam exposure system, again controlled by computer.
Various Printing Techniques
Photolithography comprises the formation of images with visible or U V radiation in a photoresist using contact proximity, or projection printing. Here we will discuss about these printing techniques.
1. Contact Printing
In this printing technique, the photomask is pressed against the resist coated wafer with a pressure typically in the range of 0.05 atm to 0.3 atm and exposure by light of wavelength near 400 micro meters. A resolution of less than 1 micro meter linewidth is possible, but it may vary across the wafer because of spatial non-uniformity of the contact. To provide better contact over the whole wafer, a thin (0.2 mm) flexible mask has been used.
2. Proximity Printing
In proximity or shadow printing, there exists a gap between mask and wafer in the range of 20 to 50 micro meters. This has the advantage of longer mask life because there is no contact between the mask and the wafer. In the proximity printing, the mask and wafer are both placed in an equipment called a projection aligner. Looking through a microscope, an operator brings the mask into close proximity [say 10 to 20 micro meters] to the wafer and properly aligns the wafer and mask using alignment mark on the mask and the wafer. UV light is then projected through the mask on to the entire resist coated wafer at one time. This mask that is used is a full wafer x 1 mask. The resolution of this process is a function of the wavelength of the light source and the distance between the mask and the wafer. Typically, the resolution of proximity printing is 2 to 4 micro meter and is therefore not suitable for a process requiring less than a 2 um minimum line width.
3. Projection Printing
In this case the image is actually projected with the help of a system of lenses, onto the wafer. The mask can be used a large number of times, substantially reducing the mask cost per wafer. Theoretically a mask can be used an unlimited-number of times, but actual usage is limited to about 100,000 times because the mask must be cleaned due to dust accumulation, and it is scratched at each cleaning. This is costliest of the conventional systems, however mask life is good, and resolution obtained is higher than proximity printing together with large separation between mask and wafer.
Automated Mask Generation
As discussed above, layouts of electronic circuit are drawn on large mylar sheets. They can also be drawn on a CRT screen by which layouts are stored digitally in a magnetic tape (or disk). In this case we need to prepare many layouts since each layout represents a pattern on each mask to be used during fabrication. Since the layouts are to be stored digitally, it is required to convert the layouts drawn on mylar sheets into digital data. This is performed by a digitizer with the aid of a computer. Then different portions of each layout are displayed on a CRT one by one and inspected for further mistakes. After all the corrections have been made, a reticle, which is a small photographic plate of the layout image, is prepared from each layout stored on the magnetic tape.
Depending upon the type of equipment used, the mask to be fabricated contains one IC chip pattern which is repeated as many times as there are on the wafer. Alternatively, the mask consists of only magnified chip pattern as shown in the figure below.
The two most common approaches to automated mask making or generation are
- Using optical projection and
- Using electron beam
A pattern generator (PG) tape is used as the Input to both approaches. The PG tape, contains the digitized data necessary to control the light source or electron beam that is used to write a pattern on a photosensitive glass plate. An Ax10 pattern for a single chip (called a x10 reticle) is first produced. This reticle is then photo enlarged by a factor of 15, yielding x 150 blowback, which is used for visual checking. A x 1 mask of the type shown in the figure is then produced from the x 10 reticle by optical reduction and projection onto a second photosensitive plate. The same pattern is stepped and repeated on this plate as many as there are chips on the wafer. This step and repat operation is performed by photo repeater. The glass plate is then developed yielding a x 1 mask which is called a master mask and looks like a tile floor where each rectangular tile has the same layout image of the chp. During the step and repeat process the position and angle of the reticle are precisely aligned with the help of two fiducial marks incorporated in the PG files of all layouts in the same relative position with respect to the entire chip. The master mask plate is then placed in close proximity to the wafer and optically projected on to a resist-coated wafer during the lithographic process.
The figure below shows the second approach. This employs electron-beam mask generation equipment winch generates the mask plate in one step. The layout data are converted into a hit map of 1’s and 0’s on a raster image. The electron beam sweeps the row in a repeating S pattern, blanking or unblanking the beam according to the input bit value, 0 or 1. In the figure, the x10 reticle is optically reduced and stepped directly onto the wafer. This is referred to as direct-step on wafer (DSW) lithography.
The main advantage of electron-beam pattern generator is speed in the case of complex chips. A large, dense chip can require 20 hours or more of optical pattern generator time, but only two hours or less of electron-beam pattern generator time.