Oxidation Process in IC Fabrication

john May 28, 2010 No Comments
To know the basics click on the following links TAKE A LOOK : IC FABRICATION TECHNIQUES TAKE A LOOK : SILICON SUBSTRATE PREPARATION TAKE A LOOK : CHEMICAL VAPOUR DEPOSITION (CVD) Utility of Thermal Oxidation The function of a...
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Chemical Vapor Deposition (CVD)

john March 21, 2011 No Comments
Chemical Vapor Deposition Process In this article, Chemical Vapor Deposition process is explained in detail. The epitaxial deposition, uses, and also the epitaxial growth of silicon is explained in detail. Doping and Autodoping, Epitaxial Reactors, Epitaxial Growth Process, their...
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Silicon Substrate Preparation

john March 21, 2011 No Comments
Silicon Substrate Preparation Process In this article the details on how a silicon substrate is prepared is given.We have structured the article into 5 sections as give below for easy and effective reading. 1. The silicon crystal growth 2....
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IC Fabrication Techniques

john February 16, 2011 5 Comments
IC Fabrication Techniques In this article, the different processing techniques that are needed for IC , transistor and diode fabrication are listed. A small procedure of the fabrication process is also explained. In a monolithic IC, all the circuit...
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Understanding FPGA and CPLD

jojo April 22, 2010 No Comments
Introduction In the earlier 60’s it was discrete logic used by electronic industry. The digital system would look like noodle like maze of wiring between components. Once it is built it will be difficult to do rework on it....
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Cadence Design Framework II

Jais Abraham March 2, 2010 No Comments
Cadence Design Framework II All the tools from cadence for the VLSI design process use the same unique database called Design Framework II (DFII). It is a binary database that stores the data as objects. In the world of...
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VLSI Design Flow

Jais Abraham July 26, 2018 No Comments
The chip design includes different types of processing steps to finish the entire flow. For anyone, who just started his carrier as a VLSI engineer has to understand all the steps of the VLSI design flow to become  good...
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