PIC 16F877 – USART Modules
This article explains the different USART modules used in PIC 16F877 like Asynchronous (full-duplex), Synchronous â€“ Master (half-duplex), and Synchronous â€“ Slave (half-duplex). The USART Baud Rate Generator (BRG) is also explained in detail along with the register table. The applications of USART is also given.
TAKE A LOOK : INTRODUCTION TO PIC 16F877
TAKE A LOOK : PIC 16F877 – ARCHITECTURE AND MEMORY ORGANIZATION
TAKE A LOOK : REGISTER MEMORY ORGANIZATION IN PIC 16F877
TAKE A LOOK : TIMER MODULES IN PIC 16F877
TAKE A LOOK : CCP MODULES IN PIC 16F877
The Universal Synchronous Asynchronous Receiver Transmitter (USART) module is one of the serial I/O modules for communication interfacing functions with other devices/units. USART is also known as a Serial Communications Interface or SCI. The USART can be configured as a full-duplex asynchronous system that can communicate with peripheral devices, such as CRT terminals and personal computers, or it can be configured as a half-duplex synchronous system that can communicate with peripheral devices, such as Analog-to-Digital (A/D) or Digital-to-Analog (D/A) integrated circuits, serial EPROMâ€™s, and so on. Usually PIC 16F877 consists of two USART modules (USART1, USART2).Â These ports can be configured in the following modes:
â€¢ Asynchronous (full-duplex)
â€¢ Synchronous â€“ Master (half-duplex)
â€¢ Synchronous â€“ Slave (half-duplex)
The USART module also has a multi-processor communication capability using 9-bit address detection.
USART Baud Rate Generator (BRG)
The baud rate generator (BRG) supports both the Asynchronous and Synchronous modes of the USART modules. It is a dedicated 8-bit baud rate generator. The SPBRG register controls the period of a free running 8-bit timer. In Asynchronous mode, bit BRGH also controls the baud rate.
Registers associated with baud rate generator is shown below.
USART Asynchronous Mode
In asynchronous mode, the USART uses standard Non-Return to- Zero (NRZ) format (one Start bit, eight or nine data bits and one Stop bit). The most commonly used data format is 8 bits. An on-chip, dedicated, 8-bit Baud Rate Generator can be used to derive standard baud rate frequencies from the oscillator. The USART transmits and receives the LSB (Least Significant Bit) first. The transmitter and receiver are functionally independent but use the same data format and baud rate. The baud rate generator produces a clock, either x16 or x64 of the bit shift rate, depending on bit â€œBRGH â€œ. Parity is not supported by the hardware but can be implemented in software (and stored as the ninth data bit). Asynchronous mode is stopped during Sleep. Asynchronous mode is selected by clearing bit SYNC.
The USART Asynchronous module consists of the following important elements:
â€¢ Baud Rate Generator
â€¢ Sampling Circuit
â€¢ Asynchronous Transmitter
â€¢ Asynchronous Receiver
USART Asynchronous Transmitter
USART transmitter (simply called TX) is commonly used for data transmission process. The data transmission is possible through various digital formats. The path of the transmission vary according to the requirements (e.g.: infrared, Bluetooth, etc.). A simple block diagram of a USART transmitter is shown below. . The heart of the USART transmitter is the Transmit (Serial) Shift Register (TSR). The shift register obtains its data from the Read/Write Transmit Buffer, TXREG. The TXREG register is loaded with data in software. The TSR register is not loaded until the Stop bit has been transmitted from the previous load. As soon as the Stop bit is transmitted, the TSR is loaded with new data from the TXREG register (if available). The simple block diagram of a USART transmitter is given below.
The registers associated with USART asynchronous transmission is shown in the table below.
USART Asynchronous Receiver
The USART asynchronous receiver is a data reception unit which is used for data reception from other communication medias such as RF modules, Bluetooth, infrared modules (IR), etc. The simple block diagram of a USART receiver is shown in the figure below. The data is received on the RC7/RX/DT pin and drives the data recovery block. The data recovery block is actually a high-speed shifter, operating at x16 times the baud rate; whereas the main receive serial shifter operates at the bit rate or at FOSC. Once Asynchronous mode is selected, reception is enabled by setting bit CREN .The heart of the receiver is the Receive (Serial) Shift Register (RSR). After sampling the Stop bit, the received data in the RSR is transferred to the RCREG register (if it is empty). If the transfer is complete, flag bit, RCIF (PIR1<5>), is set.
USART Receiver Block Diagram
The registers associated with the USART receiver is given in the table below.
Applications of USART Modules
1)Â Â Â Â Â Used for Bluetooth communications.
2)Â Â Â Â Â Widely used in Infrared (IR) communications.
3)Â Â Â Â Â USART modules used with other RF communication purposes – AM, FM, QPSK, PSK, FSK, Wi-Fi, and so on.